Digital storage tube target structure

ABSTRACT

The target is made up of a conducting layer on an insulating substrate with individual conducting regions electrically isolated from the main portion of the conducting layer. The individual regions are shaped to partially enclose an extension of the conducting layer so that an electrostatic charge on a conducting region will affect the ability of an electron beam to reach the portion of the conducting layer which is partially enclosed by a conducting region.

United States Patent [1 1- Marlowe Mar. 25, 1975 I DIGITAL STORAGE TUBE TARGET STRUCTURE [75] Inventor: Frank Jerome Marlowe, Kingston,

{73] Assignee: RCA Corporation, New York, NY.

[22] Filed: May 29, 1973 [21] Appl. No.: 364,663

[52] US. Cl. 313/391, 313/392 [51] Int. Cl I-IOlj 31/58, HOlj 29/45 [58] Field of Search 313/65 AB, 66, 68 R [56] References Cited UNITED STATES PATENTS 3,440,477 4/1969 Crowell et a1. 313/66 X 3,774,116 11/1973 Marlowe et a1. .7 313/68 R X FOREIGN PATENTS OR APPLICATIONS 1.114.948 10/1961 Germany 313/68 R Primary Examiner-Robert Sega] Attorney, Agent, or Firm-G1enn H. Bruestle; Robert J. Boivin [57] ABSTRACT The target is made up of a conducting layer on an insulating substrate with individual conducting regionselectrically isolated from the main portion of the conducting laycr. The individual regions are shaped to partially enclose an extension of the conducting layer so that an electrostatic charge on a conducting region will affect the ability of an electron beam to reach the portion of the conducting layer which is partially enclosed by a conducting region.

8 Claims, 3 Drawing Figures DIGITAL STORAGE TUBE TARGET STRUCTURE BACKGROUND OF THE INVENTION The invention disclosed herein was made in the course of, or under, a contract or subcontract thereunder with the Department of the Air Force.

This invention relates to storage tube targets and in particular relates to a silicon storage tube target to be used as a digital memory having nondestructive readout.

Silicon storage tubes are devices which are used to store information by applying electric potentials to insulating regions of the target material. In the operation of a silicon storage tube, an electron beam is addressed across the face of the target. The amount of beam current reaching the target material is dependent upon the potential of the insulating region or regions on the face of the silicon target being addressed by the electron beam. During information readout, these insulating regions are generally made to have a nonpositive potential. The more negative the potential of such an insulating region, the less the beam current will affect the output of the tube.

An important feature of storage tubes is their dependence upon the secondary emission characteristics of the target material. In the literature, such as in the book entitled, Storage Tubes by N. Knoll and B. Kazan, John Wiley and Sons, Inc., New York, 1952, the secondary emission characteristics of materials are discussed. Storage tubes make use of the secondary emission characteristic of target material to charge or discharge the insulating regions on the face of the tube.

In the past, storage tubes have been designed primarily as analog devices. To this end, a typical target might consist of a large number of isolated insulating regions on a highly conductive silicon substrate. In the operation of such a tube, the insulating regions would have static charges developed across them on the face of the tube corresponding to the image which was stored on the tube. These insulating regions were made to be very small and numerous so that an electron beam scanned across the face of the tube would encompass many of such regions at any given time. Thus, the readout from such a tube at any given point is highly dependent upon the charges of the neighboring regions as well as on the regions directly under the electron beam. This dependence of the output upon the charge of a plurality of isolated insulating regions is undesirable for digital applications, as discrete output levels are necessary in such applications rather than a composite output related to the charges of numerous regions.

As the output of a storage tube is dependent upon the current which travels through the conductive substrate of the tube, merely enlarging the size of the insulating regions to reduce the dependence of the output upon neighboring regions and separating them is an undesirable approach to the utilization of storage tubes and digital applications as the enlargement of such insulating regions would act to prevent the beam from reaching the conductive substrate, thereby precluding any output. Furthermore, the separation of the insulating regions to reduce the tubes output dependence at a point upon the charges of the neighboring points would be wasteful of target area which is undesirable in a digital application. Such applications ideally require a maximum packing density to achieve maximum efficiency.

Such a packing density cannot be achieved with prior targets. 1

SUMMARY OF THE INVENTION A target structure for a digital storage tube is presented which comprises an insulating substrate; a conductive layer upon the substrate; a plurality of conductive regions electrically isolated from the conductive layer, each of which substantially surrounds at least a portion of the conductive layer, the regions each being capacitively coupled to the conductive layer.

Also presented is an improved digital storage tube of the type comprising an evacuated vacuum-containing envelope, an electron gun within the envelope; a cathode within and at one end of the envelope; and a target within the envelope opposite the cathode wherein the improvement comprises a target adapted for digital applications comprising an insulating substrate; a conductive layer upon the substrate; a plurality of conductive regions electrically isolated from the conductive layer, each of which substantially surrounds at'least a portion of the conductive layer, the regions each being capacitively coupled to the conductive layer.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross sectional view of a storage tube employing the present invention along with a schematic representation showing the biasing arrangement for the target structure;

FIG. 2 is a graph showing a typical secondary emission curve for silicon; and

FIG. 3 is a perspective view of a portion of one embodiment of the present invention.

DETAILED DESCRIPTION I. General Considerationwl l Referring generally to FIG. 1, one embodiment of the invention is the digital storage tube 10. The tube 10 comprises a vacuum-containing glass envelope'12 having gun electrodes 13 at one end and target electrodes 14 at the other end. Inside the envelope 12 at the end having the target electrodes 14 is a target retaining member 15 holding a target 16. Disposed inside the major portion of the envelope 12 is an electron gun assembly 17 for generating an electron beam which is focussed and deflected across the target 16 by exterior magnetic coils not shown. At the end of the gun assembly 17 is a metal collector grid 18. At the end of the gun assembly 17 remote from the collector 18 is a cathode 20.

Referring generally to FIG. 2, a typical secondary emission curve for silicon is shown. The curve compares '0}, the ratio of the secondary current, I to the primary current, I,,, as a function of primary electron voltage, V,,, expressed in electron volts. By primary current, 1,, is meant the current of the electron beam imposed upon the target. By secondary current," I,, is meant the current which is emitted by the target as a result of the bombardment of the target by the electron beam. As shown in FIG. 2, there are distinct regions in the secondary emission curve wherein 8 is either less than or greater than unity. As will be seen, this secondary emission phenomenon will be used in the operation of the target of the present invention.

Referring generally to FIG. 3, a portion of the target 16 of the present invention is shown. The target 16 comprises a substrate 22 of an insulating material such as sapphire upon which there is a layer 24 of a conducting material, such as highly conductive N-type silicon. The target 16 of the preferred embodiment further comprises a plurality of substantially horseshoe-shaped regions 26 which are preferably of the same material as the conducting layer 24. The substantially horseshoeshaped regions 26 are electrically isolated from the conducting layer 24 by moat-like regions 27 completely separating the horseshoe-shaped regions 26 from the conducting layer 24. The horseshoe-shaped regions 26 each have a pair of legs 28, 30 which partially enclose a finger-like extension 32 of the conducting layer 24.

The target 16 further comprises a gold contact 36 to which is attached an output electrode 40. As will be further explained hereinafter, a chromium adherence layer 34 lies between the gold contact 36 and the conductive layer 24.

The output electrode 40 is the only one of the target electrodes 14, shown in FIG. 1, which is of interest to the present invention. The other target electrodes 14, shown in FIG. 1, may be used for beam addressing systems and are not of interest to the present invention. In the operation of the tube 10, the output electrode 40 will be connected through a load element such as a resistor 42, to a variable bias supply 44 which is used to bias the target 16 relative to the cathode 20.

II. Read Mode In the operation of a digital storage tube employing the target 16 of the present invention, an electron beam having a diameter which is preferably less than the distance between the legs 28, 30 of the horsehoeshaped regions 26 is projected onto a finger-like extension 32. The amount of current which will pass through the conducting layer 24 and consequently through the load resistor 42 as a result of the imposition of the electron beam upon the finger-like extension 32 will be determined primarily by the voltage potential with respect to the cathode to which the horseshoe-shaped region 26 is charged.

In particular, in a binary device, it is desirable to have each horseshoe-shaped region 26 charged to either 0 volts relative to the cathode 20, or to the negative cutoff voltage, V,,,. By cutoff is meant that voltage, negative with respect to the cathode 20, to which the horseshoe-shaped region 26 must be charged so that an electron beam aimed at the finger-like extension 32 of that particular horseshoe-shaped region 26 will be completely reflected as a result of electrostatic forces so that no current will be imposed upon the output electrode 40 as a result of the imposition of the electron beam. In particular, this means that none of the beam will reach the finger-like extension 32 due to reflection caused by the static charge upon the horseshoe-shaped region 26. Such reflected electrons will be collected by the collector grid 18 which is operated at a potential of about 400 volts relative to the cathode 20.

On the other hand, if the horseshoe-shaped region 26 is at the same potential as the cathode of the tube 10, an electron beam emitted by the cathode 20 will impinge upon the finger-like extension 32, thereby providing for a maximum output current upon the output electrode 40. In order to utilize the target 16 in a binary storage tube 10, a beam addressing system capable of positioning an electron beam onto the finger-like extension 32 of each horseshoe-shaped region 26 will be required. The beam addressing system must be able to address a particular horseshoe-shaped element 26 as required. Thus, for example, in a particular application such as a computer memory, a series of rows of horseshoe-shaped elements 26 might be fabricated upon a target 16, with each row consisting of a number of horseshoe-shaped elements 26 corresponding to the number of bits per word for this application. To read a particular word, it will be necessary to address the extensions 32 of a particular row. Preferably, the beam will be interrupted during the transition from the extension 32 of one horseshoe element 26 to that of another, so that it will not strike the horseshoe-shaped regions 26. An addressing scheme which accomplishes the aforementioned requirements is described in copending application Ser. No. 250,803 filed May 5, 1972 by Frank .I. Marlowe, which is incorporated by reference herein.

III. Erase Mode In order to erase the information stored on the target 16, it will be necessary to bring all of the horseshoeshaped regions 26 to the same potential. It should be recognized by those skilled in the art that the horseshoe-shaped regions 26 and the conducting layer 24 can be looked upon as two conducting regions which are separated by a dielectric. Therefore, they form a capacitor. By increasing the voltage on the bias supply 44 by an amount equivalent to the cutoff voltage, V for the target 16, those horseshoe-shaped regions 16 which were at zero volts relative to the cathode will be raised to +V while those regions 26 which were at V will be raised in potential to zero volts. This results from the capacitive coupling which exists between the conductive layer 24 and the horseshoeshaped regions 26 and the requirement that the potential across a capacitive element remains constant absent a flow of charge. The next step in erasing the information from the target 16 is to scan an electron beam over the horseshoe-shaped regions 26. The horseshoeshaped regions 26 which have a positive static charge relative to the cathode 20 will be struck by the electron beam and discharged to the potential of the cathode, while those other horseshoe-shaped regions 26 which are at cathode potential will not be affected by the electron beam. The fact that the horseshoe-shaped regions 26 are conductive means that they may be struck at any point by the electron beam. Collection of negative charge will be precluded by electrostatic forces. Once the positively charged regions 26 have been dis charged, the bias supply 44 is lowered to its normal read voltage. This has the effect of reducing the potential of all of the horseshoe-shaped regions 26 to V,,,. Thus, after the target 16 has been erased, each of the horseshoe-shaped regions 26 will be lowered in potential to the cutoff potential.

Referring generally to FIG. 2, the procedure for erasing information on the storage target 16 can be understood for the target 16 of the preferred embodiment utilizing silicon. The normal read potential of the bias supply 44 of the preferred embodiment is 5.5 volts. A typical cutoff voltage, V,,,, is negative 10 volts. By raising the voltage of the bias supply 44 from 5.5 volts to 15.5 volts, it can be seen from FIG. 2 that the target potential is in the region lying below the first crossover potential for silicon which occurs at about 40 volts. By crossover potential is meant that energy in electron volts between the cathode 20 and the target material at which the secondary emission ratio, 8 is unity. It can thus be seen that for operation of the target 16 in this region, an electron beam hitting the horseshoe-shaped region 26 will not be fully reflected, so the net flow of current will be out of the region 26 as long as the region 26 has a positive potential.

IV. Write Mode In order to write information upon target 16, it is necessary to first increase the voltage potential of the bias supply 44 in order to have the target at a voltage above the first crossover potential, V for that particular material. Thus, for the silicon target 16 of the preferred embodiment, it is necessary to raise the bias supply 44 by an amount sufficient to bring the horseshoe-shaped regions 26 above about 40 volts. However, it is preferable to increase the voltage of the bias supply 44 by an amount sufficient to increase the potential of the horseshoe-shaped regions 26 to well above the first crossover potential, v in order to achieve adequate secondary emission gain. It should be recognized in addition, that as a write step will follow an erase step, the voltage potentials of the horseshoe-shaped regions 26 will all be at "V, relative to the cathode 20 with the bias supply 44 set to the read voltage. This means that in adjusting the bias supply 44 this factor should be taken into consideration.

For example, if a secondary emission gain of 2 can be achieved by operating the horseshoe-shaped regions 26 at a potential of 170 volts relative to the cathode 20, it will be necessary in the example given above, to increase the voltage of the biasing supply 44 to 185.5 volts--5.5 volts being the normal read voltage, plus 10 volts to offset the V potential on the regions 26, plus 170 volts.

A secondary emission gain means that there is more current being emitted by the horseshoe-shaped regions 26 than is imposed upon them when operated in this region. Thus, an electron beam imposed upon a horseshoe-shaped region 26 having a potential greater than the first crossover potential, V will cause the secondary emission of an even greater amount of negative carriers. This means that the net effect of the imposition of an electron beam upon a horseshoe-shaped region 26 operated at a potential greater than the first crossover potential, V will be an increase in the potential of that horseshoe-shaped region 26. Thus, the imposition of the electron beam comprised of negative carriers onto the horseshoe-shaped region 26 increases the potential of that region 26.

To write information onto the target 16 of the preferred embodiment, an electron beam is imposed upon various horseshoe-shaped regions 26 for a time sufficient to increase their potential by V This can be accomplished by using the beam addressing system previously referred to, to address the electron beam onto those regions 26 on which it is desired to write. Then, the voltage of the bias supply 44 is reduced to its read" voltage. This results in the newly charged horseshoe-shaped regions 26 having a zero potential while those which had been erased will have a potential of V,,,. In the above example, those horseshoe-shaped regions 26 which were charged will have had their potential increased from 170 volts to 180 volts by the presence of an electron beam projected onto them. When the potential of the bias supply 44 is reduced from 185.5 volts to 5.5 volts, the potential of those horseshoe-shaped regions 26 which had been struck by the electron beam will be reduced to zero, while the horseshoe-shaped regions 26 which did not have the electron beam directed at them will have a potential of V i.e., -l0 volts.

It has been found that the target 16 of the present invention has an essentially nondestructive readout. Stored data has been read out of such targets well over 3000 times using beam current pulses of nanoamps having 2.5 microseconds duration. A tube 10 employing the target 16 of the present invention would'be ideal for computer memory elements as such memories would be completely electronic in nature, would have random access, and would not be subject to memory loss in the event of power failures. A tube 10 employing the present invention could be fabricated fairly simply as will be explained hereinafter. Such tubes could store specialized programs which could be plugged into the memory module of a computer or pulled out at any time and stored without deterioration.

V. Manufacture of the Target In order to manufacture the target 16 of the present invention, one starts with a substrate 22 of an insulating material such as sapphire. Upon the substrate 22 a layer 24 of a conductive material such as silicon having an N type conductivity is grown. In the preferred embodiment, a donor concentration of 10 atoms/cm is used in order to have the layer 24 be quite conductive. However, a lower donor concentration can be used. In the preferred embodiment, a silicon conductive layer 24 is grown epitaxially upon a sapphire substrate 22 because the lattice structure of silicon and sapphire are close enough to allow-such epitaxial growth. However, it should be noted and recognized by one skilled in the art that it is not necessary in theory to use silicon, or any other semiconductor, but that silicon is used in the preferred embodiment simply because the methods of growing extremely pure silicon are known. Also, the secondary emission characteristics of silicon are well known. In theory, however, any other highly conducting N or P type semiconductor or metal having a secondary emission curve having at least one region with a secondary emission ratio less than unity and a second region having a secondary emission of greater than unity can be employed in making the target 16.

Following the growth of the epitaxial layer 24 onto the sapphire substrate 22, the exposed surface of the epitaxial layer 24 is coated with a photoresist material. The moat-like regions 27 are defined by a mask, the photoresist material is exposed to light, and the material overlying these regions is developed out. The layer 24 is then etched by a suitable etchant to remove all of the silicon down to the substrate 22.

Following the etching step, the remaining photoresist material is removed from the surfaces of the conductive layer 24 and the newly formed horseshoe-shaped regions 26. An electrode 40 is attached to the conductive layer 24 by first depositing a layer 34 of chromium onto the surface of the conductive layer 24 by any well known technique, such as by vacuum deposition. The chromium layer 34 acts as an adherence layer to the silicon layer 24 and allows for the deposition of a gold layer 36 onto the chromium layer 34. The gold layer 36 maybe deposited by any well known technique such as by vacuum deposition or by electroplating. The electrode 40 is then bonded to the gold layer 36 by any acceptable bonding technique such as by ultrasonic bond- As can be seen from the above description of the method of making the target 16 of the preferred embodiment, it is quite simple to make such target 16 as no complex junctions must be formed.

1 claim: 1. A digital storage tube comprising: a. an envelope, b. an electron gun in said envelope for addressing an electron beam along a path, and c. a target electrode in the path of said beam within said envelope, said target electrode including:

l. a substrate of insulating material;

2. a layer of conductive material on a major surface of said substrate; said layer including a major surface with a plurality of openings extending through said layer to said major surface of said substrate, and across which the path of said electron beam extends; and

3. a plurality of electrical charge storage elements addressible with said electron beam, in the path of said beam across said conductive layer; each of said storage elements comprising a conductive region on said substrate within respective ones of said openings in said layer; said conductive regions being electrically isolated from said conductive layer, and each other, by said substrate and by a region of electrical insulation between each of said conductive regions and said layer; each of said conductive regions including a substantially horseshoe-shaped surface portion in the path of said beam across said conductive layer; said conductive layer including a plurality of finger-like projections, in the path of said beam, extending between leg portions of each of said horseshoe-shaped conductive regions; each of said conductive regions being surrounded by said conductive layer.

2. The tube of claim 1, wherein said region of electrical insulation comprises a moat-like space between said layer of conductive material and each of said conductive regions.

3. The tube of claim 2 wherein said substrate is comprised of sapphire.

4. The tube of claim 3 wherein said conductive layer is comprised of a doped semiconductor.

5. The tube of claim 3 wherein said conductive layer is comprised of N-type silicon.

6. The tube of claim 5 wherein said silicon has a donor impurity concentration of at least 10" atoms/cm.

7. The tube of claim 5 wherein each of said conductive regions is comprised of N-type silicon.

8. The tube of claim 1 further comprising means for making electrical connections to said conductive layer. 

1. A digital storage tube comprising: a. an envelope, b. an electron gun in said envelope for addressing an electron beam along a path, and c. a target electrode in the path of said beam within said envelope, said target electrode including: l. a substrate of insulating material;
 2. a layer of conductive material on a major surface of said substrate; said layer including a major surface with a plurality of openings extending through said layer to said major surface of said substrate, and across which the path of said electron beam extends; and
 3. a plurality of electrical charge storage elements addressible with said electron beam, in the path of said beam across said conductive layer; each of said storage elements comprising a conductive region on said substrate within respective ones of said openings in said layer; said conductive regions being electrically isolated from said conductive layer, and each other, by said substrate and by a region of electrical insulation between each of said conductive regions and said layer; each of said conductive regions including a substantially horseshoe-shaped surface portion in the path of said beam across said conductive layer; said conductive layer including a plurality of finger-like projections, in the path of said beam, extending between leg portions of each of said horseshoe-shaped conductive regions; each of said conductive regions being surrounded by said conductive layer.
 2. a layer of conductive material on a major surface of said substrate; said layer including a major surface with a plurality of openings extending through said layer to said major surface of said substrate, and across which the path of said electron beam extends; and
 2. The tube of claim 1, wherein said region of electrical insulation comprises a moat-like space between said layer of conductive material and each of said conductive regions.
 3. The tube of claim 2 wherein said substrate is comprised of sapphire.
 3. a plurality of electrical charge storage elements addressible with said electron beam, in the path of said beam across said conductive layer; each of said storage elements comprising a conductive region on said substrate within respective ones of said openings in said layer; said conductive regions being electrically isolated from said conductive layer, and each other, by said substrate and by a region of electrical insulation between each of said conductive regions and said layer; each of said conductive regions including a substantially horseshoe-shaped surface portion in the path of said beam across said conductive layer; said conductive layer including a plurality of finger-like projections, in the path of said beam, extending between leg portions of each of said horseshoe-shaped conductive regions; each of said conductive regions being surrounded by said conductive layer.
 4. The tube of clAim 3 wherein said conductive layer is comprised of a doped semiconductor.
 5. The tube of claim 3 wherein said conductive layer is comprised of N-type silicon.
 6. The tube of claim 5 wherein said silicon has a donor impurity concentration of at least 1019 atoms/cm3.
 7. The tube of claim 5 wherein each of said conductive regions is comprised of N-type silicon.
 8. The tube of claim 1 further comprising means for making electrical connections to said conductive layer. 